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| 两侧同时换到之前的修订记录 前一修订版 | 后一修订版 两侧同时换到之后的修订记录 | ||
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analog_discovery_2_参考手册 [2016/08/02 11:50] gongyu [2.6.1. Analog Section] |
analog_discovery_2_参考手册 [2016/08/02 11:52] gongyu [2.6.1. 模拟部分] |
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| 行 270: | 行 270: | ||
| The differential inputs are driven via a low-pass filter comprised of C141 together with R10 through R13, in the buffer stage. The differential clock is AC-coupled and the line is impedance matched. The clock is internally divided by two for operating at a constant 100 MHz sampling rate. An external reference voltage is used, buffered by IC 19. The ADC generates the common mode reference voltage (VCM_SC) to be used in the buffer stage. | The differential inputs are driven via a low-pass filter comprised of C141 together with R10 through R13, in the buffer stage. The differential clock is AC-coupled and the line is impedance matched. The clock is internally divided by two for operating at a constant 100 MHz sampling rate. An external reference voltage is used, buffered by IC 19. The ADC generates the common mode reference voltage (VCM_SC) to be used in the buffer stage. | ||
| - | 查分输入电压范围: | + | 差分输入电压范围: |
| $$-1V<V_{ADC\;diff}<1V\label{19}\tag{19}$$ | $$-1V<V_{ADC\;diff}<1V\label{19}\tag{19}$$ | ||