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用于代码风格

module beeper (
input clk,
output reg speaker
);
 
reg [13:0] cnt;
always @(posedge clk) 
    if(cnt >= 15'd27271) cnt <= 15'd0; 
    else cnt <= cnt + 15'd1;
 
always @(posedge clk) 
    if(cnt >= 15'd13136) speaker <= 1'b1;
    else speaker <= 1'b0;
 
endmodule