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ddr3 [2016/05/30 18:46]
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 Double data rate type three SDRAM (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("​double data rate") interface, and has been in use since 2007. It is the higher-speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random-access memory (SDRAM) chips. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random-access memory (RAM) because of different signaling voltages, timings, and other factors. Double data rate type three SDRAM (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("​double data rate") interface, and has been in use since 2007. It is the higher-speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random-access memory (SDRAM) chips. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random-access memory (RAM) because of different signaling voltages, timings, and other factors.
-{{ :​4gb_ddr3_so-dimm.jpg |600}}+{{ :​4gb_ddr3_so-dimm.jpg |}}
 DDR3 is a DRAM interface specification. The actual DRAM arrays that store the data are similar to earlier types, with similar performance. DDR3 is a DRAM interface specification. The actual DRAM arrays that store the data are similar to earlier types, with similar performance.
  
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 DDR3 prototypes were announced in early 2005. Products in the form of motherboards appeared on the market in June 2007[6] based on Intel'​s P35 "​Bearlake"​ chipset with DIMMs at bandwidths up to DDR3-1600 (PC3-12800).[7] The Intel Core i7, released in November 2008, connects directly to memory rather than via a chipset. The Core i7 supports only DDR3. AMD's first socket AM3 Phenom II X4 processors, released in February 2009, were their first to support DDR3. DDR3 prototypes were announced in early 2005. Products in the form of motherboards appeared on the market in June 2007[6] based on Intel'​s P35 "​Bearlake"​ chipset with DIMMs at bandwidths up to DDR3-1600 (PC3-12800).[7] The Intel Core i7, released in November 2008, connects directly to memory rather than via a chipset. The Core i7 supports only DDR3. AMD's first socket AM3 Phenom II X4 processors, released in February 2009, were their first to support DDR3.
  
-====Dual-inline memory modules====+===Dual-inline memory modules===
 DDR3 dual-inline memory modules (DIMMs) have 240 pins and are electrically incompatible with DDR2. A key notch—located differently in DDR2 and DDR3 DIMMs—prevents accidentally interchanging them. Not only are they keyed differently,​ but DDR2 has rounded notches on the side and the DDR3 modules have square notches on the side. [8] DDR3 SO-DIMMs have 204 pins.[9] DDR3 dual-inline memory modules (DIMMs) have 240 pins and are electrically incompatible with DDR2. A key notch—located differently in DDR2 and DDR3 DIMMs—prevents accidentally interchanging them. Not only are they keyed differently,​ but DDR2 has rounded notches on the side and the DDR3 modules have square notches on the side. [8] DDR3 SO-DIMMs have 204 pins.[9]
  
 For the Skylake microarchitecture,​ Intel has also designed a SO-DIMM package named UniDIMM, which can use either DDR3 or DDR4 chips. The CPU's integrated memory controller can then work with either. The purpose of UniDIMMs is to handle the transition from DDR3 to DDR4, where pricing and availability may make it desirable to switch RAM type. UniDIMMs have the same dimensions and number of pins as regular DDR4 SO-DIMMs, but the notch is placed differently to avoid accidentally using in an incompatible DDR4 SO-DIMM socket.[10] For the Skylake microarchitecture,​ Intel has also designed a SO-DIMM package named UniDIMM, which can use either DDR3 or DDR4 chips. The CPU's integrated memory controller can then work with either. The purpose of UniDIMMs is to handle the transition from DDR3 to DDR4, where pricing and availability may make it desirable to switch RAM type. UniDIMMs have the same dimensions and number of pins as regular DDR4 SO-DIMMs, but the notch is placed differently to avoid accidentally using in an incompatible DDR4 SO-DIMM socket.[10]
  
-Latencies[edit]+===Latencies===
 While the typical latencies for a JEDEC DDR2 device were 5-5-5-15, some standard latencies for JEDEC DDR3 devices include 7-7-7-20 for DDR3-1066 and 8-8-8-24 for DDR3-1333. While the typical latencies for a JEDEC DDR2 device were 5-5-5-15, some standard latencies for JEDEC DDR3 devices include 7-7-7-20 for DDR3-1066 and 8-8-8-24 for DDR3-1333.
  
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 (7 / 667) × 1000 = 10.49475 ns (7 / 667) × 1000 = 10.49475 ns
  
-Power consumption[edit]+===Power consumption===
 Power consumption of individual SDRAM chips (or, by extension, DIMMs) varies based on many factors, including speed, type of usage, voltage, etc. Dell's Power Advisor calculates that 4 GB ECC DDR1333 RDIMMs use about 4 W each.[12] By contrast, a more modern mainstream desktop-oriented part 8 GB, DDR3/1600 DIMM, is rated at 2.58 W, despite being significantly faster.[13] Power consumption of individual SDRAM chips (or, by extension, DIMMs) varies based on many factors, including speed, type of usage, voltage, etc. Dell's Power Advisor calculates that 4 GB ECC DDR1333 RDIMMs use about 4 W each.[12] By contrast, a more modern mainstream desktop-oriented part 8 GB, DDR3/1600 DIMM, is rated at 2.58 W, despite being significantly faster.[13]
  
-JEDEC standard modules[edit]+====JEDEC standard modules====
 Standard name Standard name
  ​ Memory clock  ​ Memory clock
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 Alternative naming: DDR3 modules are often incorrectly labeled with the prefix PC (instead of PC3), for marketing reasons, followed by the data-rate. Under this convention PC3-10600 is listed as PC1333.[16] Alternative naming: DDR3 modules are often incorrectly labeled with the prefix PC (instead of PC3), for marketing reasons, followed by the data-rate. Under this convention PC3-10600 is listed as PC1333.[16]
  
-Variants[edit]+====Variants====
 In addition to bandwidth designations (e.g. DDR3-800D), and capacity variants, modules can be one of the following: In addition to bandwidth designations (e.g. DDR3-800D), and capacity variants, modules can be one of the following:
  
-ECC memory, which is an extra data byte lane used for correcting minor errors and detecting major errors for better reliability. Modules with ECC are identified by an additional ECC or E in their designation. For example: "​PC3-6400 ECC", or PC3-8500E.[17] +  * ECC memory, which is an extra data byte lane used for correcting minor errors and detecting major errors for better reliability. Modules with ECC are identified by an additional ECC or E in their designation. For example: "​PC3-6400 ECC", or PC3-8500E.[17] 
-Registered or buffered memory, which improves signal integrity (and hence potentially clock rates and physical slot capacity) by electrically buffering the signals with a register, at a cost of an extra clock of increased latency. Those modules are identified by an additional R in their designation,​ for example PC3-6400R.[18] +  ​* ​Registered or buffered memory, which improves signal integrity (and hence potentially clock rates and physical slot capacity) by electrically buffering the signals with a register, at a cost of an extra clock of increased latency. Those modules are identified by an additional R in their designation,​ for example PC3-6400R.[18] 
-Non-registered (a.k.a. "​unbuffered"​) RAM may be identified by an additional U in the designation.[18] +  ​* ​Non-registered (a.k.a. "​unbuffered"​) RAM may be identified by an additional U in the designation.[18] 
-Fully buffered modules, which are designated by F or FB and do not have the same notch position as other classes. Fully buffered modules cannot be used with motherboards that are made for registered modules, and the different notch position physically prevents their insertion. +  ​* ​Fully buffered modules, which are designated by F or FB and do not have the same notch position as other classes. Fully buffered modules cannot be used with motherboards that are made for registered modules, and the different notch position physically prevents their insertion. 
-Load Reduced modules, which are designated by LR and are similar to registered/​buffered memory, in a way that LRDIMM modules buffer both control and data lines while retaining the parallel nature of all signals. As such, LRDIMM memory provides large overall maximum memory capacities, while addressing some of the performance and power consumption issues of FB memory induced by the required conversion between serial and parallel signal forms. +  ​* ​Load Reduced modules, which are designated by LR and are similar to registered/​buffered memory, in a way that LRDIMM modules buffer both control and data lines while retaining the parallel nature of all signals. As such, LRDIMM memory provides large overall maximum memory capacities, while addressing some of the performance and power consumption issues of FB memory induced by the required conversion between serial and parallel signal forms. 
-Both FBDIMM (fully buffered) and LRDIMM (load reduced) memory types are designed primarily to control the amount of electric current flowing to and from the memory chips at any given time. They are not compatible with registered/​buffered memory, and motherboards that require them usually will not accept any other kind of memory.+  ​* ​Both FBDIMM (fully buffered) and LRDIMM (load reduced) memory types are designed primarily to control the amount of electric current flowing to and from the memory chips at any given time. They are not compatible with registered/​buffered memory, and motherboards that require them usually will not accept any other kind of memory.
  
-DDR3L and DDR3U extensions[edit]+====DDR3L and DDR3U extensions====
 The DDR3L (DDR3 Low Voltage) standard is an addendum to the JESD79-3 DDR3 Memory Device Standard specifying low voltage devices. The DDR3L standard is 1.35 V and has the label PC3L for its modules. Examples include DDR3L‐800 (PC3L-6400),​ DDR3L‐1066 (PC3L-8500),​ DDR3L‐1333 (PC3L-10600),​ and DDR3L‐1600 (PC3L-12800). The DDR3L and DDR3U specifications are compatible with the original DDR3 standard and can run at either the lower voltage or at 1.50 V.[19] The DDR3L (DDR3 Low Voltage) standard is an addendum to the JESD79-3 DDR3 Memory Device Standard specifying low voltage devices. The DDR3L standard is 1.35 V and has the label PC3L for its modules. Examples include DDR3L‐800 (PC3L-6400),​ DDR3L‐1066 (PC3L-8500),​ DDR3L‐1333 (PC3L-10600),​ and DDR3L‐1600 (PC3L-12800). The DDR3L and DDR3U specifications are compatible with the original DDR3 standard and can run at either the lower voltage or at 1.50 V.[19]
  
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 JEDEC Solid State Technology Association announced the publication of JEDEC DDR3L on July 26, 2010.[20] JEDEC Solid State Technology Association announced the publication of JEDEC DDR3L on July 26, 2010.[20]
  
-Standards with similar names[edit] +====Standards with similar names==== 
-LPDDR3[edit]+===LPDDR3===
 LPDDR3 (Low Power DDR3) is a mobile DDR SDRAM standard, designed for mobile computing, and shares little in common with DDR3 memory - except maybe the maximum data rate.[21] LPDDR3 (Low Power DDR3) is a mobile DDR SDRAM standard, designed for mobile computing, and shares little in common with DDR3 memory - except maybe the maximum data rate.[21]
  
-GDDR3[edit]+===GDDR3===
 GDDR3 (Graphics DDR3) memory, sometimes incorrectly referred to as "​DDR3"​ because of its similar name, is an entirely different SDRAM standard designed for use in graphics cards. GDDR3 (Graphics DDR3) memory, sometimes incorrectly referred to as "​DDR3"​ because of its similar name, is an entirely different SDRAM standard designed for use in graphics cards.
  
-Serial presence detect[edit]+===Serial presence detect===
 DDR3 memory utilises serial presence detect.[22] Serial presence detect (SPD) is a standardized way to automatically access information about a computer memory module, using a serial interface. It is typically used during the power-on self-test for automatic configuration of memory modules. DDR3 memory utilises serial presence detect.[22] Serial presence detect (SPD) is a standardized way to automatically access information about a computer memory module, using a serial interface. It is typically used during the power-on self-test for automatic configuration of memory modules.
  
-Release 4[edit]+===Release 4===
 Release 4 of the DDR3 Serial Presence Detect (SPD) document (SPD4_01_02_11) adds support for Load Reduction DIMMs and also for 16b-SO-DIMMs and 32b-SO-DIMMs. Release 4 of the DDR3 Serial Presence Detect (SPD) document (SPD4_01_02_11) adds support for Load Reduction DIMMs and also for 16b-SO-DIMMs and 32b-SO-DIMMs.
  
 JEDEC Solid State Technology Association announced the publication of Release 4 of the DDR3 Serial Presence Detect (SPD) document on September 1, 2011.[23] JEDEC Solid State Technology Association announced the publication of Release 4 of the DDR3 Serial Presence Detect (SPD) document on September 1, 2011.[23]
  
-XMP extension[edit]+===XMP extension===
 Intel Corporation officially introduced the eXtreme Memory Profile (XMP) Specification on March 23, 2007 to enable enthusiast performance extensions to the traditional JEDEC SPD specifications for DDR3 SDRAM.[24] Intel Corporation officially introduced the eXtreme Memory Profile (XMP) Specification on March 23, 2007 to enable enthusiast performance extensions to the traditional JEDEC SPD specifications for DDR3 SDRAM.[24]
  
-Feature summary[edit] +====Feature summary==== 
-Components[edit] +===Components=== 
-Introduction of asynchronous RESET pin +  ​* ​Introduction of asynchronous RESET pin 
-Support of system-level flight-time compensation +  ​* ​Support of system-level flight-time compensation 
-On-DIMM mirror-friendly DRAM pinout +  ​* ​On-DIMM mirror-friendly DRAM pinout 
-Introduction of CWL (CAS write latency) per clock bin +  ​* ​Introduction of CWL (CAS write latency) per clock bin 
-On-die I/O calibration engine +  ​* ​On-die I/O calibration engine 
-READ and WRITE calibration +  ​* ​READ and WRITE calibration 
-Dynamic ODT (On-Die-Termination) feature allows different termination values for Reads and Writes +  ​* ​Dynamic ODT (On-Die-Termination) feature allows different termination values for Reads and Writes 
-Modules[edit] +===Modules=== 
-Fly-by command/​address/​control bus with on-DIMM termination +  ​* ​Fly-by command/​address/​control bus with on-DIMM termination 
-High-precision calibration resistors +  ​* ​High-precision calibration resistors 
-Are not backwards compatible—DDR3 modules do not fit into DDR2 sockets; forcing them can damage the DIMM and/or the motherboard[25] +  ​* ​Are not backwards compatible—DDR3 modules do not fit into DDR2 sockets; forcing them can damage the DIMM and/or the motherboard[25] 
-Technological advantages over DDR2[edit] +===Technological advantages over DDR2=== 
-Higher bandwidth performance,​ up to 2133 MT/s standardized +  ​* ​Higher bandwidth performance,​ up to 2133 MT/s standardized 
-Slightly improved latencies, as measured in nanoseconds +  ​* ​Slightly improved latencies, as measured in nanoseconds 
-Higher performance at low power (longer battery life in laptops) +  ​* ​Higher performance at low power (longer battery life in laptops) 
-Enhanced low-power features +  ​* ​Enhanced low-power features 
-Development and market penetration[edit] +===Development and market penetration=== 
-In May 2005, Desi Rhoden, chairman of the JEDEC committee responsible for creating the DDR3 standard, stated that DDR3 had been under development for "about 3 years"​.[26] DDR3 was launched in 2007, but sales were not expected to overtake DDR2 until the end of 2009, or possibly early 2010, according to Intel strategist Carlos Weissenberg,​ speaking during the early part of their roll-out in August 2008.[27] (The same timescale for market penetration had been stated by market intelligence company DRAMeXchange over a year earlier in April 2007,[28] and by Desi Rhoden in 2005.[26]) The primary driving force behind the increased usage of DDR3 has been new Core i7 processors from Intel and Phenom II processors from AMD, both of which have internal memory controllers:​ the former requires DDR3, the latter recommends it. IDC stated in January 2009 that DDR3 sales would account for 29% of the total DRAM units sold in 2009, rising to 72% by 2011.[29]+In May 2005, Desi Rhoden, chairman of the JEDEC committee responsible for creating the DDR3 standard, stated that DDR3 had been under development for "about 3 years"​.[26] DDR3 was launched in 2007, but sales were not expected to overtake DDR2 until the end of 2009, or possibly early 2010, according to Intel strategist Carlos Weissenberg,​ speaking during the early part of their roll-out in August 2008.[27] (The same timescale for market penetration had been stated by market intelligence company DRAMeXchange over a year earlier in April 2007,[28] and by Desi Rhoden in 2005.[26]) The primary driving force behind the increased usage of DDR3 has been new Core i7 processors from Intel and Phenom II processors from AMD, both of which have internal memory controllers:​ the former requires DDR3, the latter recommends it. IDC stated in January 2009 that DDR3 sales would account for 29% of the total DRAM units sold in 2009, rising to 72% by 2011.
  
-Successor[edit] +====Successor====
-Main article: DDR4 SDRAM+
 In September 2012, JEDEC released the final specification of DDR4.[30] The primary benefits of DDR4 compared to DDR3 include a higher range of clock frequencies and data transfer rates[31] and significantly lower voltage. Intel Haswell CPUs released in 2H 2014 (e.g. E5-16xx/​26xx v3 server CPUs released on 9 September 2014) were among the first to use DDR4. In September 2012, JEDEC released the final specification of DDR4.[30] The primary benefits of DDR4 compared to DDR3 include a higher range of clock frequencies and data transfer rates[31] and significantly lower voltage. Intel Haswell CPUs released in 2H 2014 (e.g. E5-16xx/​26xx v3 server CPUs released on 9 September 2014) were among the first to use DDR4.
- 
-See also[edit] 
-List of device bandwidths 
-Low power DDR3 SDRAM (LPDDR3) 
-Multi-channel memory architecture 
-Notes[edit] 
-Jump up ^ Prior to revision F, the standard stated that 1.975 V was the absolute maximum DC rating.[4] 
-References[edit] 
-Jump up ^ Cutress, Ian (2014-02-11). "​I'​M Intelligent Memory to release 16GB Unregistered DDR3 Modules"​. anandtech.com. Retrieved 2015-04-20. 
-Jump up ^ McCloskey, Alan, Research: DDR FAQ, retrieved 2007-10-18 
-^ Jump up to: a b c "DDR3 SDRAM standard (revision F)". JEDEC. July 2012. Retrieved 2015-07-05. 
-Jump up ^ "DDR3 SDRAM standard (revision E)" (PDF). JEDEC. July 2010. Retrieved 2015-07-05. 
-Jump up ^ Jaci Chang Design Considerations for the DDR3 Memory Sub-system. Jedex, 2004, p. 4. http://​www.jedex.org/​images/​pdf/​samsung%20-%20jaci_chang.pdf 
-Jump up ^ Soderstrom, Thomas (2007-06-05). "Pipe Dreams: Six P35-DDR3 Motherboards Compared"​. Tom's Hardware. 
-Jump up ^ Fink, Wesley (2007-07-20). "Super Talent & TEAM: DDR3-1600 Is Here!"​. AnandTech. 
-Jump up ^ "​DocMemory"​ (2007-02-21). "​Memory Module Picture 2007". 
-Jump up ^ "​204-Pin DDR3 SDRAM unbuffered SODIMM design specification"​. JEDEC. May 2014. Retrieved 2015-07-05. 
-Jump up ^ http://​www.techpowerup.com/​205231/​how-intel-plans-to-transition-between-ddr3-and-ddr4-for-the-mainstream.html 
-Jump up ^ Shilov, Anton (2008-10-29). "​Kingston Rolls Out Industry’s First 2GHz Memory Modules for Intel Core i7 Platforms"​. Xbit Laboratories. Retrieved 2008-11-02. 
-Jump up ^ "Dell Energy Smart Solution Advisor"​. Essa.us.dell.com. Retrieved 2013-07-28. 
-Jump up ^ http://​www.kingston.com/​dataSheets/​KVR16N11_8.pdf 
-Jump up ^ Pc3 10600 vs. pc3 10666 What's the difference - New-System-Build,​ Tomshardware.com,​ retrieved 2012-01-23 
-Jump up ^ Kingston'​s 2,544 MHz DDR3 On Show at Computex, News.softpedia.com,​ 2010-05-31, retrieved 2012-01-23 
-Jump up ^ Crucial Value CT2KIT51264BA1339 PC1333 4GB Memory RAM (DDR3, CL9) Retail, www.amazon.co.uk,​ 2016-05-10, retrieved 2016-05-10 
-Jump up ^ Memory technology evolution: an overview of system memory technologies (PDF), Hewlett-Packard,​ p. 18 
-^ Jump up to: a b "What is LR-DIMM, LRDIMM Memory? (Load-Reduce DIMM)"​. simmtester.com. Retrieved 2014-08-29. 
-Jump up ^ "Does LV and ULV DDR3 is normal ddr3?"​. Tom's Hardware. Retrieved 2016-05-10. 
-Jump up ^ "​Specification Will Encourage Lower Power Consumption for Countless Consumer Electronics,​ Networking and Computer Products"​. 
-Jump up ^ "When is LPDDR3 not LPDDR3? When it’s DDR3L…"​. synopsys.com. Retrieved 12 December 2015. 
-Jump up ^ "​Understanding DDR3 Serial Presence Detect (SPD) Table"​. simmtester.com. Retrieved 12 December 2015. 
-Jump up ^ "JEDEC Announces Publication of Release 4 of the DDR3 Serial Presence Detect Specification"​. 
-Jump up ^ "Intel Extreme memory Profile (Intel XMP) DDR3 Technology"​ (PDF). Retrieved 2009-05-29. 
-Jump up ^ "DDR3: Frequently Asked Questions"​ (PDF). Retrieved 2009-08-18. 
-^ Jump up to: a b Sobolev, Vyacheslav (2005-05-31). > "​JEDEC:​ Memory standards on the way". DigiTimes.com. Archived from the original on January 1, 1970. Retrieved 2011-04-28. JEDEC is already well along in the development of the DDR3 standard, and we have been working on it for about three years now.... Following historical models, you could reasonably expect the same three-year transition to a new technology that you have seen for the last several generations of standard memory 
-Jump up ^ "IDF: "DDR3 won't catch up with DDR2 during 2009""​. pcpro.co.uk. 19 August 2008. Retrieved 2009-06-17. 
-Jump up ^ Bryan, Gardiner (April 17, 2007). "DDR3 Memory Won't Be Mainstream Until 2009". ExtremeTech.com. Retrieved 2009-06-17. 
-Jump up ^ Salisbury, Andy (2009-01-20). "New 50nm Process Will Make DDR3 Faster and Cheaper This Year". MaximumPC.com. Retrieved 2009-06-17. 
-Jump up ^ "JEDEC Announces Publication of DDR4 Standard - JEDEC"​. JEDEC. Retrieved 12 October 2014. 
-Jump up ^ Shilov, Anton (August 16, 2010). "​Next-Generation DDR4 Memory to Reach 4.266GHz – Report"​. XbitLabs.com. Retrieved 2011-01-03. 
  
 ====External links==== ====External links====