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| 两侧同时换到之前的修订记录 前一修订版 | 上一修订版 两侧同时换到之后的修订记录 | ||
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实验2-1_2选1选择器 [2017/03/02 10:40] zhijun |
实验2-1_2选1选择器 [2017/03/02 10:45] zhijun |
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| 行 29: | 行 29: | ||
| ==== 程序清单mux21.v ==== | ==== 程序清单mux21.v ==== | ||
| + | ==== 程序清单mux21.v ==== | ||
| + | |||
| + | <code verilog> | ||
| + | // -------------------------------------------------------------------- | ||
| + | // >>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< | ||
| + | // -------------------------------------------------------------------- | ||
| + | // File name : gates.v | ||
| + | // Module name : gates | ||
| + | // Author : Step | ||
| + | // Description : Logic gates | ||
| + | // Web : www.stepfpga.com | ||
| + | // | ||
| + | // -------------------------------------------------------------------- | ||
| + | // Code Revision History : | ||
| + | // -------------------------------------------------------------------- | ||
| + | // Version: |Mod. Date: |Changes Made: | ||
| + | // V1.0 |2015/11/11 |Initial ver | ||
| + | // -------------------------------------------------------------------- | ||
| module mux21 | module mux21 | ||
| ( | ( | ||
| 行 39: | 行 57: | ||
| led , | led , | ||
| empty | empty | ||
| - | ); | + | ); |
| //******************* | //******************* | ||
| //DEFINE INPUT | //DEFINE INPUT | ||
| 行 57: | 行 75: | ||
| reg y3; | reg y3; | ||
| wire y4; | wire y4; | ||
| - | //plan A, Combinational logic style | + | //plan A, Combinational logic style |
| assign y1=~s&a|s&b; | assign y1=~s&a|s&b; | ||
| - | + | | |
| //plan B, using "always" and "if" | //plan B, using "always" and "if" | ||
| always @ (a,b,s) | always @ (a,b,s) | ||
| 行 76: | 行 94: | ||
| //plan D | //plan D | ||
| assign y4=s?b:a; | assign y4=s?b:a; | ||
| + | |||
| + | | ||
| assign led[0]=~y1; //led is low active | assign led[0]=~y1; //led is low active | ||
| assign led[1]=~y2; | assign led[1]=~y2; | ||
| 行 81: | 行 101: | ||
| assign led[3]=~y4; | assign led[3]=~y4; | ||
| | | ||
| - | assign empty=10'b11_1111_1111; //led's defualt mode is lighted | + | assign empty=10'b11_1111_1111; //led's defualt mode is lighted |
| - | endmodule | + | |
| + | endmodule | ||
| + | |||
| + | </code> | ||
| + | |||
| + | |||
| ===== 五、 实验步骤===== | ===== 五、 实验步骤===== | ||